Process Catalog

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CMP is a service organization in ICs and MEMS for prototyping and low volume productions.

  • CMP provides several regular and advanced CMOS technologies. BiCMOS RF, High voltage and Smart power are among our Specialty technology portfolio.
  • CMP provides two types of MEMS technologies for prototyping: Integrated bulk micromachining technologies and specific surface micromachining technologies.

Since 1981, 614 customers from 70 countries have been served, more than 7900 projects have been prototyped through 1043 runs and 72 different technologies have been interfaced. 
Some history data are available on this link

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IC 28nm CMOS28FDSOI

STMicroelectronics
Advanced CMOS FDSOI technology with 8 metal layers

IC 55nm BiCMOS055

STMicroelectronics
BiCMOS SiGe technology with 8 metal layers

IC 65nm CMOS065

STMicroelectronics
Advanced CMOS technology with 7 metal layers

IC 130nm BiCMOS9MW

STMicroelectronics
BiCMOS SiGe technology with 6 metal layers

IC 130nm H9SOI-FEM

STMicroelectronics
Advanced CMOS SOI technology with 4 metal layers

IC 0.16µm BCD8sP

STMicroelectronics
BCD High Voltage technology with 4 metal layers

IC 130nm HCMOS9GP

STMicroelectronics
CMOS technology with 6 metal layers

IC 0.16µm BCD8s-SOI

STMicroelectronics
BCD SOI High Voltage technology with 4 metal layers

IC 130nm HCMOS9A

STMicroelectronics
CMOS High Voltage technology with 4 metal layers

IC 0.18µm aC18A6

ams
CMOS technology with 6 metal layers, for Power management applications MEMS and Sensor

IC 0.35µm C35B4C3

ams
CMOS technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip

IC 0.18µm aH18A6

ams
CMOS High Voltage technology with 6 metal layers, for Mixed signal analog digital, HV designs, system on chip

IC 0.35µm ARC C35B4O1

ams
CMOS Opto ARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded

IC 0.35µm BARC C35B4OA

ams
CMOS Opto BARC technology with 4 metal layers, for Provides enhanced optical sensitivity for embedded

IC 0.35µm RF C35B4M3

ams
CMOS RF technology with 4 metal layers, for Mixed signal analog digital, large digital designs, system on chip, RF.

IC 0.35µm C35B4E3

ams
CMOS technology with 4 metal layers, for The process is fully compatible with C35B4C3 Mixed signal analog digital

IC 0.35µm H35B4D3

ams
CMOS High Voltage technology with 4 metal layers, for Mixed signal analog digital, HV designs, system on chip

MEMS Specific MEMS technologies PolyMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS.

IC 0.35µm S35D4M5

ams
BiCMOS SiGe technology with 4 metal layers, for Mixed signal analog/RF/digital, large digital designs, system on chip

MEMS Specific MEMS technologies SOIMUMPs

MEMSCAP
MEMS MUMPS, for MEMS, micromechanics, MOEMS

MEMS Bulk Micromachining Backside Bulk Micromachining

ams
CMOS BS Bulk Micromachining technology with 4 metal layers

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration

MEMS Bulk Micromachining Frontside Bulk Micromachining

ams
CMOS FS Bulk Micromachining technology with 4 metal layers, for MEMS, micromechanics, MOEMS.

MEMS TDSI MIDIS TMMIDIS

TELEDYNE DALSA
MEMS, for Accelerometers Gyroscopes Resonators Inertial sensor combos (Sensor fusion)

OPEN 3D Frontside UBM post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration

OPEN 3D Frontside Bumps post-process

IRT Nanoelec/LETI-CEA
Wafer-level packaging Flip-Chip Packaging, for Single die flip-chip, 3D/2.5D integration

Silicon Photonic ICs Si310-PHMP2M

IRT Nanoelec/LETI-CEA
Si-Photonics technology with 2 metal layers, for Telecom, DataCom, ComputerCom

Passive Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, for Passive Silicon Si-Interposer for 3D/2.5D integration

ams 0.35 and 0.18 Wafer-level bumping

ams
Flip-Chip Packaging, for Single die flip-chip packaging

OPEN 3D Backside post-process (TSV, RDL & Bumps)

IRT Nanoelec/LETI-CEA
Wafer-level packaging, for 3D/2.5D integration

Gold stud bumping

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, for Single die flip-chip packaging

MAD200 Memory Advanced Demonstrator 200mm

IRT Nanoelec/LETI-CEA
CMOS NVM, for Storage Class memory, Embedded memory, Neuromorphic, Computing, Artificial Intelligence accelerator.

OPEN 3D Frontside Micro-Bumps post-process

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging, for 3D/2.5D integration

Solder bumping post process

IRT Nanoelec/LETI-CEA
Flip-Chip Packaging Wafer-level packaging, for Flip-chip packaging

0.35µm Active Silicon Interposer with UBM

ams
Si-Interposer technology with 4 metal layers, for Active Silicon Si-Interposer for 3D/2.5D integration
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